FMC225

An ADC/DAC FMC module is an FPGA Mezzanine Card that adds high-speed analog input and/or analog output channels to an FPGA carrier board.

• ADC means analog-to-digital converter. It converts real-world analog signals into digital samples the FPGA can process.
• DAC means digital-to-analog converter. It converts digital data from the FPGA into an analog waveform.

The module usually includes:

• One or more ADC or DAC channels
• Analog front-end circuitry
• Clock and synchronization inputs
• Trigger connections
• FMC or FMC+ connector
• Sometimes JESD204B or JESD204C high-speed serial interfaces
• Front-panel RF connectors such as SMA

Typical applications include:

• Software-defined radio
• Radar
• Oscilloscopes and waveform generators
• Communications testing
• Scientific data acquisition
• Feedback and control systems

Description:

FMC225 is an FPGA Mezzanine Module per VITA 57 specification. It has an ADC 12-bit at 4.0 GSPS and a DAC 14-bit at 2.85 GSPS direct RF synthesis.

FMC225 utilizes TI ADC12J4000 ADC providing 12-bit conversion at rates of up to 4.0 GSPS and an Analog Devices AD9129 DAC providing 14-bit conversion at rates of up to 2.85 GSPS. The DAC core is based on a quad-switch architecture that enables dualedge clocking operation, effectively increasing the DAC update rate to 5.7 GSPS when configured for Mix-Mode™ or 2x interpolation. The input sampling clock can be via thefront panel or the on board wide-band PLL. The FMC225 has a trigger input which is routed to the FMC connector as well as to the ADC.

The analog input/output, clock input and trigger inputs are routed via SSMC connectors.

Key Features:

• FPGA Mezzanine Card (FMC) per VITA 57
• TI ADC12J4000 ADC
  • Usable output bandwidth of 800 MHz at 4x decimation and 4000 MSPS
  • Usable output bandwidth of 100 MHz at 32x decimation and 4000 MSPS
  • Bypass Mode for full Nyquist output bandwidth
• Analog Devices AD9129 DAC
  • DC-to-1.4 GHz in Baseband mode
  • DC-to-1.0 GHz in 2x Interpolation mode
  • 1.4 to 4.2 GHz in Mix-Mode
• Supported by DAQ Series™ data acquisition software
• Excellent dynamic performance
• Front panel interface includes CLK In, Trig In, Analog In/Out, and GPIO
• Ultra Low-Noise wide-band PLL
• On-chip delay locked loops (DLLs) optimize timing between different clock domains.

FMC225 Datasheet